Staff ASIC Design Engineer

Overview

In this role you will own the full ASIC development cycle, from architecture and RTL design to verification, DFT, implementation, and silicon validation. You will contribute to mixed‑signal design and lead design methodology improvements within a global technology company based in Cambridge. You will tackle challenging digital and mixed‑signal problems, partnering with cross‑functional teams to deliver production‑ready ASICs. This is a hands‑on, leadership‑oriented opportunity in a leading semiconductor hub with a strong focus on quality, performance and innovation.

Pay / Benefits

• competitive compensation
• joining stock
• Employee stock purchase scheme

Responsibilities

• Design and develop digital blocks and contribute to complete mixed‑signal ASICs from concept to production
• Support product definition via feasibility studies, architecture development, and FPGA-based emulation
• Develop RTL in SystemVerilog meeting performance/functional/quality requirements
• Create block‑level verification environments and testbenches for digital validation
• Perform digital synthesis and set physical design constraints to meet PPA targets
• Generate and maintain design documentation and participate in design reviews
• Provide technical leadership and mentorship to team members
• Drive continuous improvement of digital design methodologies and best practices

Key requirements

• Minimum 5 years of digital IC design experience using standard-cell methodologies
• Deep knowledge of industry-standard digital design methodologies and best practices
• Expertise in fully synthesised digital design flows including RTL development and logic synthesis
• Proficiency in SystemVerilog and modern digital EDA toolchains
• Experience applying timing and physical design constraints in auto‑place‑and‑route flows
• Hands-on experience with DFT techniques (e.g., scan) to maximise test coverage
• Practical experience with low‑power digital design techniques and power optimisation
• Proficiency in TCL and Python scripting

• leadership and mentorship
• cross‑functional collaboration
• problem solving and analytical thinking
• SystemVerilog
• RTL development
• logic synthesis

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