Arm is seeking an experienced verification engineer to lead the verification of a DPU subsystem within the Systems Media IP team. You will architect high-performance SystemVerilog/UVM environments and ensure robust verification across multiple units, aligning with project plans and schedules.
You will work with Python/C for tooling and contribute to verification strategies, tests, coverage, and integration into complete systems.
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Hampshire
We're looking for a Senior Verification Engineer to join a specialist RTL team developing advanced communications technology across ASIC and FPGA…
Southampton, Hampshire
We're looking for a Senior Verification Engineer to join a specialist RTL team developing advanced communications technology across ASIC and FPGA…
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