FPGA Engineer

Overview

In this role you will design and optimize high-throughput FPGA hardware for space-based communications, turning complex algorithms into hardware solutions. You’ll work alongside systems architects, algorithm engineers, and verification teams across the full development lifecycle to deliver production-ready hardware. Expect hands-on RTL work, verification, and platform optimizations that balance performance, area, and power. This opportunity offers exposure to cutting-edge FPGA/ASIC development in a mission-driven environment with cross-functional collaboration.

Responsibilities

• Develop RTL in Verilog/SystemVerilog for high-throughput digital systems
• Create verification environments and perform FPGA/ASIC validation
• Implement designs on modern FPGA platforms and optimise for performance, resource usage, and power
• Contribute across the full development lifecycle from architecture to system integration
• Collaborate with systems architects, algorithm engineers, and verification teams
• Contribute to engineering best practices and production-ready hardware
• Work with multidisciplinary teams to deliver robust hardware

Key requirements

• Strong RTL development using Verilog or SystemVerilog
• Experience developing FPGA and/or ASIC designs
• Knowledge of timing closure, synthesis, and hardware optimisation
• Experience with FPGA verification and simulation methodologies
• Familiarity with AMD/Xilinx FPGA toolchains
• Strong communication skills and experience in multidisciplinary teams
• Experience with digital communications, DSP, UVM, AMBA, PCIe, JESD, Python, or ASIC development (advantageous)

• strong communication
• team collaboration
• problem solving
• Verilog/SystemVerilog RTL
• FPGA/ASIC design
• timing closure

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