As a PIC Layout Engineer, you will design and prepare photonic integrated circuit layouts and fabrication masks. You will collaborate with fabrication teams to ensure layouts meet process constraints and mask-set readiness. Your work will involve generating and verifying GDSII data, and automating layout tasks through Python scripting. You will engage with foundries to align design rules and fabrication processes, enabling reliable, scalable photonic devices. This role offers hands-on impact in cutting-edge photonics within a fast-moving team.
Responsibilities
Design and prepare PIC layouts and fabrication masks
Generate, edit and verify GDSII data for layout and masks
Prepare mask sets for semiconductor / photonic fabrication
Ensure compliance with design rules, layer stacks, and fabrication constraints
Automate layout tasks using Python scripting and tooling
Collaborate with foundries and fabrication teams to align processes
Key requirements
PIC layout experience
Strong experience with GDSFactory and KLayout
GDSII generation, editing and verification
Mask layout and mask-set preparation for semiconductor / photonic fabrication
Understanding of design rules, layer stacks and fabrication constraints
Python scripting and layout automation
Experience with foundries and fabrication processes is a plus
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