Design Verification Engineer (EDI)

Overview

In this role you will contribute to digital verification for complete mixed-signal ICs, leading verification efforts and shaping reusable testbenches. You’ll collaborate with cross-functional teams across Edinburgh or Newbury within Cirrus Logic’s innovative, inclusive culture. The position offers exposure to cutting-edge projects and opportunities to improve verification methodologies. Join a global organisation that values development, flat structure, and meaningful impact on product quality.

Pay / Benefits

• personal and professional development
• flat culture
• hybrid work arrangement

Responsibilities

• Define IC verification plan linking requirements to test cases
• Lead verification engineers to deliver thoroughly verified ICs
• Create reliable, reusable testbenches for complex subsystems and ICs
• Participate in verification specialist groups and contribute to methodology discussions
• Coach and support the verification team to follow defined practices
• Hands-on project design/verification involvement

Key requirements

• BEng / BSc / MEng / MSc in Electronics / Computer Science or related
• Proven track record delivering first-time success with complex mixed-signal ICs
• Metric-driven verification: planning, requirements extraction, constrained random verification, functional and code coverage
• SystemVerilog and SVA
• Testbench design with UVM/OVM/VMM
• RTL, testbench, OOP, gate-level (including SDF); debugging skills
• Strong problem-solving ability and analytical mindset; innovative, lateral thinker

• innovative and creative thinking
• strong problem-solving and analytical skills
• ability to interpret results and resolve issues
• SystemVerilog
• SVA (SystemVerilog Assertions)
• Testbench design with UVM/OVM/VMM

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