RTL Design Team Lead – FPGA / ASIC

Spectrum IT Recruitment is working with an innovative communications technology company developing advanced signal-processing IP for next-generation 5G and satellite communications .

Their technology is helping enable 5G base stations onboard satellites , supporting the development of non-terrestrial networks (NTN) with the potential to extend mobile coverage across the globe.

This could be an excellent opportunity for an existing RTL Design Lead, FPGA / ASIC Team Lead, Principal RTL Engineer, Principal Digital Design Engineer or experienced FPGA / ASIC Engineer looking to take on greater technical and team leadership responsibility.

They are looking for an experienced RTL Design Team Lead to take a key technical and leadership role within the business. This is a hands-on position combining RTL design, technical leadership and team development , with responsibility for delivering complex Layer 1 IP targeting FPGA and ASIC platforms.

The Role

As RTL Design Team Lead, you'll lead a talented hardware design team while remaining closely involved in the technical development and delivery of complex IP.

You'll work alongside Algorithm, System Architecture and Software teams, helping shape technical decisions and translating product requirements into high-performance hardware solutions.

Key responsibilities

• Leading the technical delivery of complex FPGA and ASIC design projects
• Providing hands-on technical leadership across RTL design and implementation
• Leading, mentoring and developing a high-performing hardware design team
• Contributing to the technical roadmap for future generations of the company's technology
• Working with executive and product teams to translate requirements into hardware deliverables
• Overseeing RTL designs targeting FPGA and ASIC using industry-standard design techniques
• Driving optimisation for timing, hardware resources, throughput and power efficiency
• Supporting verification activities, including the development of UVM-based testbenches
• Developing and improving engineering methodologies, processes and design techniques
• Exploring opportunities to integrate AI tools into engineering workflows
• Supporting technical discussions with customers during presales and product development

About You

We're looking for an experienced RTL / digital design engineer who has progressed into technical or team leadership but still enjoys being close to the technology.

You'll need

• Proven experience leading and developing high-performing engineering teams
• Expert knowledge of RTL design using Verilog and SystemVerilog
• Strong experience delivering complex digital designs targeting FPGA and ASIC
• Experience optimising timing and hardware resources for high-throughput data or signal-processing applications
• Knowledge of power-management techniques, synthesis and timing analysis
• Strong experience with industry-standard EDA simulation and synthesis tools
• Experience taking complex hardware designs through the development lifecycle
• An understanding of project delivery methodologies, including Agile and Waterfall
• Experience with requirements capture and traceability

Experience in any of the following would be advantageous

• Communications or signal-processing algorithms, such as error correction, equalisation, channel estimation or beamforming
• UVM verification techniques and IP verification
• High-speed interfaces such as AMBA, PCIe or JESD
• C++ / SystemC for design modelling and integration
• Technology Readiness Models
• System architecture within multidisciplinary engineering projects
• 5G, wireless communications or telecommunications systems

Why Apply?

This is an opportunity to take a senior role in the development of technology at the intersection of semiconductors, 5G and satellite communications .

You'll have the opportunity to influence technical direction, develop a highly skilled engineering team and remain hands-on with complex FPGA / ASIC technology, while contributing to communications systems designed for the next generation of global connectivity.

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